Design Inputs
Supply & Source
V
Ω
Ω
Bias divider
Ω
Ω
Collector / Emitter
Ω
Ω
Ω
Feedback
Ω
Transistor (2N3904)
V
DC Operating Point
Base circuit
Vth (Thévenin)
Rth
VB
IB
Currents / Voltages
IC ≈ IE
VE
VC
VCE
DC formulas
V_th = V_CC · Rbias2 / (Rbias1 + Rbias2)
R_th = Rbias1 ‖ Rbias2
I_B = (V_th − V_BE) / (R_th + (β+1)·Re)
I_C = β · I_B
V_E = I_E · Re (C blocks DC through Rd)
V_C = V_CC − I_C · Rc
V_CE = V_C − V_E (want ≳ 1 V for active region)
Small-Signal Analysis (Hayward FBA)
Transducer Gain Gt
power delivered to RL vs. available from RS
—dB
Intrinsic / degeneration
re = 26/IE(mA)
rd (ext. AC) = Re‖Rd
Rd,tot = re+rd
RL,ac = Rc‖Rl
Amplifier ports (with feedback)
Zin
Zout
Av ≈ −RL,ac/Rd,tot
Matching quality
Input return loss
Output return loss
Input VSWR
Output VSWR
Design targets
Char. Z = √(Rf·Rd,tot)
Matched Rd = RSRL/Rf
Matched Rf = RSRL/Rd
Loop factor Rf/Rd,tot
Small-signal formulas (Hayward)
Transistor model: voltage-controlled current source, g_m = 1/r_e
r_e = 26 mV / I_E(mA) (intrinsic)
R_d,tot = r_e + (Re ‖ Rd_ac) (total emitter degeneration)
R_L,ac = Rc ‖ Rl (AC load at collector)
Input / output impedance (with Rf shunt feedback):
Z_in = R_d,tot · (R_L,ac + R_f) / (R_L,ac + R_d,tot)
Z_out = R_d,tot · (R_f + R_S) / (R_d,tot + R_S)
Voltage gain (approx, high-gm limit): A_v ≈ −R_L,ac / R_d,tot
Transducer gain (power gain into matched load):
G_t = 10·log10[ 4·R_L·R_S·(R_f − R_d,tot)² /
(R_d,tot·R_L + R_d,tot·R_f + R_S·R_L + R_S·R_d,tot)² ] dB
Matched condition (R_S=R_L): R_d,tot · R_f = R_S · R_L
Setting R_S = R_L = Z gives the characteristic impedance:
Z = √(R_f · R_d,tot)
This is the port impedance the amplifier "wants" to see for a
simultaneous input/output match.
Circuit reference
Reference: Wes Hayward W7ZOI, Transistor Models and the Feedback Amplifier, 2009 — w7zoi.net/transistor_models_and_the_fba.pdf. See also the algebra supplement fba_with_simple_model.pdf.